It is well known in the art to use land grid array (“LGA”) type connection as a method for connecting a semiconductor chip having a plurality of connecting terminals to a printed wiring board (“PWB”) or a circuit panel, such as a printed circuit board (“PCB”), when it is desired to utilize use bumps in order to increase the mounting density of electronic circuitry. Bumps are normally formed on one face of the chip for electrical connection with the PWB. If an intermediate board, such as an interposer or a substrate is loaded with an IC so as to connect the IC to terminals or wirings on the PWB, bumps are often formed on one face of that interposer for securing electrical connection with the PWB.
In order to increase the density of circuitry on the PWB, a multilayered board, such as a build-up board, has been used. Using such PWB, an electronic circuit component is mounted on each face of a circuit board using, for example, face mount technology. Alternatively, in order to form conductive electric wirings between adjacent layers or between desired layers in the PWB, through holes called “vias” are provided for interlayer electric connection. The use of bumps for such interlayer connection is known. See, for example, JP 2002-359471 A.
Bumps can be formed, for example, by the screen-printing of conductive paste and by the use of metal such as copper or copper foil. Particularly, when bumps are formed using metal, the following steps are often used: A metal film (“metal layer”) such as metal foil is disposed on one face of a semiconductor chip, an interposer or a single layer of the multilayered PWB (hereinafter generally referred to as “substrate”), and a predetermined pattern is formed with photoresist to be used as an etching mask. Then portions of the metal layer which are not covered by the photoresist are removed by etching with an acid or alkaline chemical solution (“etchant”).
Often metallic terminals are provided on a substrate at portions where no bumps are formed. Thus, if bumps are formed by etching a metallic layer, it is necessary to take measures to protect these metallic terminals from any damage possibly caused by the etching process used for forming the bumps.
When copper or copper alloy is used to form connection bumps, it is known to control the depth of etching or the height of bumps, by using a metal, such as nickel, that is resistant to the copper etchant (see for example, JP 2002-359471 A, paragraphs [0020] to [0022]). Furthermore, JP 57-107501 A discloses a conductive paste containing gallium.
The use of a nickel layer that is resistant to the etchant to prevent etching damage to substrate terminals or wirings typically includes a structure that has a nickel layer between copper foil and a substrate on which terminals are formed, so as to avoid the unwanted etching of the copper.
Such a structure, however, requires a separate etching process to remove the nickel, and it becomes necessary to prevent bumps and any terminals or wirings located under the bumps from being damaged by this additional etching process.
To obtain such a structure, a nickel layer may be joined to terminals on the substrate by using a copper foil laminated with nickel, or disposing a nickel layer by plating on the substrate having terminals thereon, and then disposing a copper foil over the nickel layer. Such joining processes are often difficult to carry out.
In recent years, high impact resistance has been demanded for electronic circuitry. For this reason, if an interconnection element is used for mounting circuit parts, such as ICs, having a relatively large mass, high impact resistance is also required for BGA connecting portions which connect ICs or interposers to the PWB with solder balls. The joining process which satisfies such a requirement is difficult in practice so long as nickel is used.
The present embodiments have been achieved to solve at least some of the above-described problems.